

Moreover, while several examples of 3D growth have been demonstrated beyond simple 1D nanowires, controlled growth of complex geometries using EBID has only recently been achieved based on a combined simulation and computer aided design approach. While standard patterning of the electron beam has resulted in complex 2D deposits of arbitrary shape, care must be taken as subtle proximity effects can be minimized or exacerbated in some electron beam, gas flux and patterning, and temperature regimes. Several applications have been explored with EBID and focused electron beam induced etching including: sensors, field emission cathodes, plasmonic elements, lithographic mask repair, scanning probe tips, photonic materials, magnetic materials, nanoparticle separations, and lithographic techniques to name a few. Conveniently, EBID has the advantage of being compatible with a wide range of precursor and substrate materials. The resolution/size of the deposit is determined by the electron probe size and the interaction between the electron beam, substrate, and dynamic growth front which generates subsequent back-scattered (BSE), forward-scattered (FSE), and secondary electrons (SE). A condensed byproduct accumulates by prolonged electron exposure with the shape and composition of the resulting deposit dictated by both the electron beam scanning parameters and the properties of the precursor.

Deposition occurs during EBID as the nanoscale focused electron beam dissociates adsorbed precursor molecules. Recently, electron beam induced deposition (EBID) was extended to 3D nanoscale mesh geometries. A variety of fabrication techniques have been used to construct multi-dimensional nanostructures with differing degrees of success. Emerging applications include, but are not limited to, high strength nanolattices, optical metamaterials, accurate molecular detection, the study of biological systems important in determining cancer treatment options, and reliable, low cost, high performance magnetic hard disk drives. Further 3D device concepts and architectures will require the development of new 3D nanoscale fabrication techniques which will inevitably enhance performance and add functionality to nanoscale devices.

The first fully incorporated 3D transistor logic was reported in 2012.
